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計算機組成與設計-硬件/軟件接口-(英文版 第4版 ARM版)-(附光盤)

包郵 計算機組成與設計-硬件/軟件接口-(英文版 第4版 ARM版)-(附光盤)

出版社:機械工業出版社出版時間:2010-04-01
所屬叢書: 經典原版書庫
開本: 16開 頁數: 689
中 圖 價:¥61.8(6.5折) 定價  ¥95.0 登錄后可看到會員價
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計算機組成與設計-硬件/軟件接口-(英文版 第4版 ARM版)-(附光盤) 版權信息

計算機組成與設計-硬件/軟件接口-(英文版 第4版 ARM版)-(附光盤) 本書特色

《計算機組成與設計:硬件/軟件接口(英文版·第4版·ARM版)》為經典原版書庫。

計算機組成與設計-硬件/軟件接口-(英文版 第4版 ARM版)-(附光盤) 內容簡介

這本*暢銷的計算機組成書籍經過全面更新,關注現今發生在計算機體系結構領域的革命性變革:從單處理器發展到多核微處理器。此外,出版這本書的arm版是為了強調嵌入式系統對于全亞洲計算行業的重要性,并采用arm處理器來討論實際計算機的指令集和算術運算,因為arm是用于嵌入式設備的*流行的指令集架構,而全世界每年約銷售40億個嵌入式設備。與前幾版一樣,本書采用了一個mips處理器來展示計算機硬件技術、流水線、存儲器層次結構以及i/o等基本功能。此外,本書還包括一些關于x86架構的介紹。
  本書主要特點
  ·采用armv6(arm11系列)為主要架構來展示指令系統和計算機算術運算的基本功能。
  ·覆蓋從串行計算到并行計算的革命性變革,新增了關于并行化的一章,并且每章中還有一些強調并行硬件和軟件主題的小節。
  ·新增一個由nvidia的首席科學家和架構主管撰寫的附錄,介紹了現代gpu的出現和重要性,首次詳細描述了這個針對可視計算進行了優化的高度并行化、多線程、多核的處理器。
  ·描述一種度量多核性能的獨特方法——“roofline model”,自帶benchmark測試和分析amd opteron x4、intel xeon 5000、sun ultrasparc t2和 ibm cell的性能。
  ·涵蓋了一些關于閃存和虛擬機的新內容。
  ·提供了大量富有啟發性的練習題,內容達200多頁。
  ·將amd opteron x4和intel nehalem作為貫穿本書的實例。
  ·用spec cpu2006組件更新了所有處理器性能實例。

計算機組成與設計-硬件/軟件接口-(英文版 第4版 ARM版)-(附光盤) 目錄

contents
preface xv
chapters
computer abstractions and technology 2
1.1 introduction 3
1.2 below your program 10
1.3 under the covers 13
1.4 performance 26
1.5 the power wall 39
1.6 the sea change: the switch from uniprocessors to multiprocessors 41
1.7 real stuff: manufacturing and benchmarking the amd opteron x4 44
1.8 fallacies and pitfalls 51
1.9 concluding remarks 54
1.10 historical perspective and further reading 55
1.11 exercises 56
instructions: language of the computer 74
2.1 introduction 76
2.2 operations of the computer hardware 77
2.3 operands of the computer hardware 80
2.4 signed and unsigned numbers 86
2.5 representing instructions in the computer 93
2.6 logical operations 100
2.7 instructions for making decisions 104
2.8 supporting procedures in computer hardware 113
2.9 communicating with people 122
2.10 arm addressing for 32-bit immediates and more complex addressing modes 127
2.11 parallelism and instructions: synchronization 133
2.12 translating and starting a program 135
2.13 a c sort example to put it all together 143
: this icon identi.es material on the cd
2.14 arrays versus pointers 152
2.15 advanced material: compiling c and interpreting java 156
2.16 real stuff: mips instructions 156
2.17 real stuff: x86 instructions 161
2.18 fallacies and pitfalls 170
2.19 concluding remarks 171
2.20 historical perspective and further reading 174
2.21 exercises 174
arithmetic for computers 214
3.1 introduction 216
3.2 addition and subtraction 216
3.3 multiplication 220
3.4 division 226
3.5 floating point 232
3.6 parallelism and computer arithmetic: associativity 258
3.7 real stuff: floating point in the x86 259
3.8 fallacies and pitfalls 262
3.9 concluding remarks 265
3.10 historical perspective and further reading 268
3.11 exercises 269
the processor 284
4.1 introduction 286
4.2 logic design conventions 289
4.3 building a datapath 293
4.4 a simple implementation scheme 302
4.5 an overview of pipelining 316
4.6 pipelined datapath and control 330
4.7 data hazards: forwarding versus stalling 349
4.8 control hazards 361
4.9 exceptions 370
4.10 parallelism and advanced instruction-level parallelism 377
4.11 real stuff: the amd opteron x4 (barcelona) pipeline 390
4.12 advanced topic: an introduction to digital design using a hardware design language to describe and model a pipeline and more pipelining illustrations 392
4.13 fallacies and pitfalls 393
4.14 concluding remarks 394
4.15 historical perspective and further reading 395
4.16 exercises 395
large and fast: exploiting memory hierarchy 436
5.1 introduction 438
5.2 the basics of caches 443
5.3 measuring and improving cache performance 461
5.4 virtual memory 478
5.5 a common framework for memory hierarchies 504
5.6 virtual machines 511
5.7 using a finite-state machine to control a simple cache 515
5.8 parallelism and memory hierarchies: cache coherence 520
5.9 advanced material: implementing cache controllers 524
5.10 real stuff: the amd opteron x4 (barcelona) and intel nehalem memory hierarchies 525
5.11 fallacies and pitfalls 529
5.12 concluding remarks 533
5.13 historical perspective and further reading 534
5.14 exercises 534
storage and other i/o topics 554
6.1 introduction 556
6.2 dependability, reliability, and availability 559
6.3 disk storage 561
6.4 flash storage 566
6.5 connecting processors, memory, and i/o devices 568
6.6 interfacing i/o devices to the processor, memory, and operating system 572
6.7 i/o performance measures: examples from disk and file systems 582
6.8 designing an i/o system 584
6.9 parallelism and i/o: redundant arrays of inexpensive disks 585
6.10 real stuff: sun fire x4150 se
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計算機組成與設計-硬件/軟件接口-(英文版 第4版 ARM版)-(附光盤) 節選

《計算機組成與設計:硬件/軟件接口(英文版·第4版·ARM版)》采用了一個MIPS處理器來展示計算機硬件技術、流水線、存儲器層次結構以及I/O等基本功能。此外。《計算機組成與設計:硬件/軟件接口(英文版·第4版·ARM版)》還包括一些關于x86架構的介紹。這本*暢銷的計算機組成書籍經過全面更新,關注現今發生在計算機體系結構領域的革命性變革:從單處理器發展到多核微處理器。此外,出版這本書的ARM版是為了強調嵌入式系統對于全亞洲計算行業的重要性,并采用ARM處理器來討論實際計算機的指令集和算術運算。因為ARM是用于嵌入式設備的*流行的指令集架構,而全世界每年約銷售40億個嵌入式設備。與前幾版一樣。采用ARMv6(ARM 11系列)為主要架構來展示指令系統和計算機算術運算的基本功能。覆蓋從串行計算到并行計算的革命性變革,新增了關于并行化的一章,并且每章中還有一些強調并行硬件和軟件主題的小節。新增一個由NVIDIA的首席科學家和架構主管撰寫的附錄,介紹了現代GPU的出現和重要性,首次詳細描述了這個針對可視計算進行了優化的高度并行化、多線程、多核的處理器。描述一種度量多核性能的獨特方法——“Roofline model”,自帶benchmark測試和分析AMD Opteron X4、Intel Xeo 5000、Sun Ultra SPARC T2和IBM Cell的性能。涵蓋了一些關于閃存和虛擬機的新內容。提供了大量富有啟發性的練習題,內容達200多頁。將AMD Opteron X4和Intel Nehalem作為貫穿《計算機組成與設計:硬件/軟件接口(英文版·第4版·ARM版)》的實例。用SPEC CPU2006組件更新了所有處理器性能實例。

計算機組成與設計-硬件/軟件接口-(英文版 第4版 ARM版)-(附光盤) 相關資料

插圖:Diameters of hard disks vary by more than a factor of 3 today, from 1 inch to 35 inches, and have been shrunk over the years to fit into new products; workstation servers, personal computers, laptops, palmtops, and digital cameras have all inspired new disk form factors Traditionally, the widest disks have the highest performance and the smallest disks have the lowest unit cost The best cost per gigabyte varies Although most hard drives appear inside computers, as in Figure 17, hard drives can also be attached using external interfaces such as universal serial bus(USB).The use of mechanical components means that access times for magnetic disks are much slower than for DRAMs: disks typically take 5-20 milliseconds, while DRAMs take 50-70 nanoseconds——making DRAMs about 100,000 times faster Yet disks have much lower costs than DRAM for the same storage capacity, because the production costs for a given amount of disk storage are lower than for the same amount of integrated circuit In 2008, the cost per gigabyte of disk is 30 to 100 times less expensive than DRAM.Thus, there are three primary differences between magnetic disks and main memory: disks are nonvolatile because they are magnetic; they have a slower access time because they are mechanical devices; and they are cheaper per gigabyte because they have very high storage capacity at a modest cost.Many have tried to invent a technology cheaper than DRAM but faster than disk to fill that gap, but many have failed Challengers have never had a product to market at the right time By the time a new product would ship, DRAMs and disks had continued to make rapid advances, costs had dropped accordingly, and the challenging product was immediately obsoleteFlash memory, however, is a serious challenger This semiconductor memory is nonvolatile like disks and has about the same bandwidth, but latency is 100 to 1000 times faster

計算機組成與設計-硬件/軟件接口-(英文版 第4版 ARM版)-(附光盤) 作者簡介

David A.Patterson,加州大學伯克利分校計算機科學系教授。美國國家工程研究院院士。IEEE和ACM會士。曾因成功的啟發式教育方法被IEEE授予James H.Mulligan,Jr教育獎章。他因為對RISC技術的貢獻而榮獲1 995年IEEE技術成就獎,而在RAID技術方面的成就為他贏得了1999年IEEE Reynold Johnson信息存儲獎。2000年他~13John L.Hennessy分享了John von Neumann獎。
John L.Hennessy,斯坦福大學校長,IEEE和ACM會士。美國國家工程研究院院士及美國科學藝術研究院院士。Hennessy教授因為在RISC技術方面做出了突出貢獻而榮獲2001年的Eckert-Mauchly獎章.他也是2001年Seymour Cray計算機工程獎得主。并且和David A.Patterson分享了2000年John von Neumann獎。

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